For a long time, the PC architecture is tied-up with the x86 chips. The bond loosened only in 1984 with the release of Apple's Macintosh and its Motorola chip. Now, in over a decade, there is real chance of breaking away from the x86 architecture and the market opening to new architectures.
The x86 architecture is a CISC-based architecture. More and more processors are becoming RISCier. These new chips use lesser instructions and executes faster. This trend is becoming more the norm especially with the decision of Apple, IBM, and Motorola to joined forces and start manufacturing the PowerPC 601.
For a long time, the only supporters of RISC computers are the smaller technical workstation market. The chips that use RISC are Sun's SPARC, DEC's Alpha, the MIPS R4x00, and Hewlett-Packard's PARISC. But now, with the entry of the industry giants and their efforts to bring RISC to the PC market, deviation from the x86 architecture is a fast becoming reality.
Aside from this, emulation is also becoming a practical way to achieve compatibility among different processors. Non-x86 chips can now run 80x86 applications at acceptable speeds, and still achieve blinding performance at its native code.
Another issue that the industry is trying to address is the power requirement of the chips. Originally, only the laptop and notebook computers made power an issue because of battery life.
Due to the increase in speed of the CPU, the chips are getting so hot. Further increase in the speed of the chips would literally require water-cooling for them. As of the moment, chips working at 3 volts are becoming commonplace.
The advent of RISC chips guarantees that chips are indeed getting smaller.
A generic RISC chip contains large on-chip instruction and data caches, and 64-bit data path. Integer, floating-point, and branch-processing units are also needed. All of these are needed to implement super scalar design in the chip.
Instead of inventing new architectures, manufacturers try to maximize die yield. Other techniques they use include cutting down some bits, increase in layering, refinement of layout, and incorporation of more functions in a single chip to reduce the number of chips needed to build a computer.
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