Intro to VLSI with VHDL (3 units )

Instructor:

Dr. Rosula S.J. Reyes and Carlos M. Oppus

ECCE Dept SoSE

2^nd Semester SY2005-2006

Course Description

This course covers introduction to VLSI (c/o Dr. Reyes) with VHDL design (c/o Mr. Oppus).

What follows only describes VHDL related topics …

Course Objectives

To learn VHDL.

To be able to solve digital design problems using VHDL.

Course Topics

Introduction to VHDL.

Behavioral Modeling

Sequential processing

Data Types and Operators

Synthesis

Prerequisite:

any digital design course.

References

Perry, Douglas, VHDL 3^rd Edition, McGraw-Hill, 1999.

Rushton, Andrew, VHDL for Logic Synthesis, John Wiley & Sons,1999.

Webpage—VHDL Lectures .

http://www.simucad.com

http://www.orcad.com

http://www.erc.msstate.edu/~reese/vhdl_synthesis

http://www.gmvhdl.com/VHDL.html

Course Requirements and Grading System (VHDL part only)

Class Work ( 25%)

Tests and quizzes

Class participation (10%)

class conduct, recitation, board work, reporting,

assignments and problem sets

Programming & Simulations (50%)

Project 15%

Programs and Simulations

1. Each program is graded on a 100-point basis. The score will be based on the program, program documentation, simulation and defense of the program (for major programming assignment).
2. A deduction of 10 points per Saturday for late programs will be enforced.
3. If the instructor is not around kindly submit the program/report to the ECCE secretary/instructor’s pigeon hole.

Consultation Hours

M 11:30 am to 1:30 pm, TTh 3:30 pm to 4:30 pm else by appointment

To the Webpage—VHDL Lectures .